High voltage polymer dielectric capacitor isolation device

A method of forming an isolation device, comprising the steps of:

• providing a monolithic substrate;
• forming a PMD layer over said monolithic substrate, by a process including forming a silicon dioxide layer;
• forming a first metal level over said PMD layer, by a process including forming a first layer of interconnect metal over said PMD layer, and patterning said first layer of interconnect metal to form said first metal level;
• forming a silicon dioxide layer over said first metal layer;
• forming lower via holes in said silicon dioxide layer so as to expose said first metal level;
• forming a second metal layer over said silicon dioxide layer, said second metal level extending into said lower via holes in said silicon dioxide layer to form lower vias which make electrical connections to said first metal level;
• forming a polymer dielectric layer over said second metal level, said polymer dielectric layer comprising primarily a layer of polymer selected from the group consisting of polyimide and PBO, said polymer being at least 20 microns thick;
• forming upper via holes in said polymer dielectric layer;
• forming a third metal level over said polymer dielectric layer, said third metal level extending into via holes in said polymer dielectric layer to form upper vias which make electrical connections to said second metal level;
• forming bondpads over said third metal level;
• and
• forming a dielectric overcoat dielectric layer over said third metal level, so that said dielectric overcoat dielectric layer exposes said bondpads;
• so that said isolation device contains a plurality of isolation components, selected from the group consisting of a capacitor and a transformer, said isolation components being formed in at least said second metal level and said third metal level, said isolation device being free of transistors.