Methods for fabricating integrated circuits with the implantation of fluorine

A method for fabricating an integrated circuit comprising:

• forming a first gate electrode structure above a first active region and a second gate electrode structure above a second active region;
• forming a first spacer on sidewalls of the first and second gate electrode structures and a second spacer on sidewalls of the second gate electrode structure;
• forming deep drain and source regions selectively in the second active region by using the second spacer as an implantation mask;
• forming drain and source extension and halo regions in the first and second active regions after removal of the second spacer;
• forming a third spacer on sidewalls of the first gate electrode structure;
• and
• forming a fluorine implant region in the first active region after formation of the drain and source extension and halo regions and after formation of the third spacer,
• wherein forming the fluorine implant region comprises forming a fluorine implant region with a concentration of about 4.0E14 atoms per square centimeter to about 1.0E15 atoms per square centimeter, and
• wherein forming the fluorine implant region comprises implanting fluorine at an energy of about 8 to about 10 keV.