Replacement-gate FinFET structure and process

A method for manufacturing a fin field effect transistor (FinFET), comprising:

• forming a dummy gate over a portion of a channel region of a silicon (Si) fin of said FinFET, said Si fin being formed on a silicon germanium (SiGe) layer, which contacts a crystalline Si substrate devoid of an insulator;
• removing first portions of said SiGe layer not covered by said dummy gate including regions of said Si fin other than said channel region and removing first portions of said SiGe layer that are exposed and disposed orthogonally to said Si fin, and replacing said first portions of said SiGe layer that are removed with a first insulator;
• forming S/D regions one each side of said dummy gate in said Si fin;
• depositing extrinsic S/D regions on said S/D regions of said Si fin and on portions of said first insulator not covered by said dummy gate;
• removing said dummy gate and exposing said channel region of said Si fin and portions of said SiGe layer orthogonal to said channel region;
• removing second portions of said SiGe layer from beneath said channel region and from portions of said SiGe layer orthogonal to said channel region, and replacing said second portions of said SiGe layer that are removed with a second insulator to electrically isolate said channel region from said crystalline Si substrate by said first insulator and said second insulator;
• depositing a conformal dielectric on said channel region of said Si fin and said second insulator;
• and
• filling a space delimited by said conformal dielectric with a gate stack over said channel region of said Si fin.