Latch-up immune ESD protection

An ESD module comprising:

• an ESD circuit, the ESD circuit having a pad terminal and a low power source terminal;
• a latch-up (LU) control circuit, the LU control circuit includes a first LU input terminal coupled to a high power source, a second LU input terminal coupled to the low power source and an LU output terminal coupled to the LSD circuit;
• and
• first and second operating modes for the ESD module, wherein
• in the first operating mode, the LU control circuit is deactivated and the ESD circuit has a first triggering current It1 which is less than 100 mA, and
• in the second operating mode, the LU control circuit is activated and the ESD circuit has a second triggering current It2 which is greater than 100 mA to prevent latch up and wherein the LU control circuit includes an LU control input portion having first and second inverters coupled in series, the second inverter output serving as an output terminal of the LU control input portion,
• an LU control output portion having a transistor first terminal coupled to the high power source, a second terminal coupled to the LU output terminal and a gate terminal coupled to the output terminal of the LU control input portion, and
• in the second operating mode, a second operating mode current path is created between the Dad terminal, the LU output terminal and the high power source.

A method of forming a device comprising:

• providing a substrate prepared with an ESD module, wherein the ESD module comprises
• an ESD circuit, the ESD circuit having a pad terminal and a low power source terminal,
• a latch-up (LU) control circuit, the LU control circuit includes a first LU input terminal coupled to a high power source, a second LU input terminal coupled to the low power source and an LU output terminal coupled to the ESD circuit;
• and wherein the LU control circuit includes an LU control input portion having first and second inverters coupled in series, the second inverter output serving as an output terminal of the LU control input portion,
• and an LU control output portion having a transistor with a first terminal coupled to the high power source, a second terminal coupled to the LU output terminal and a gate terminal coupled to the output terminal of the LU control input portion, and a body coupled to the first terminal, and
• first and second operating modes fir the ESD module, wherein
• in the first operating mode, the LU control circuit is deactivated and the ESD circuit has a first triggering current It1 which is less than 100 mA, and
• in the second operating mode, the LU control circuit is activated and the ESD circuit has a second triggering current It2 which is greater than 100 mA to prevent latch up, wherein a second operating mode current path is created between the pad terminal, the LU output terminal and the high power source.