ESD protection circuit

An electrostatic discharge (ESD) protection structure comprising:

• a substrate having a first conductivity type;
• a MOS transistor comprising a plurality of gate fingers having first and second ends, the gate fingers being substantially parallel to one another and extending in a first direction on the substrate and source and drain regions formed in the substrate between the gate fingers, the source and drain regions having a second conductivity type;
• a deep well underneath the MOS transistor, the deep well having a second conductivity type;
• a first ohmic contact to the deep well;
• a second ohmic contact to the substrate, the second ohmic contact extending in a second direction substantially perpendicular to the first direction and located between the first ends of the gate fingers and the contact to the deep well;
• and
• a floating well extending in the second direction and located between the second ohmic contact and the first ends of the gate fingers, the floating well having the second conductivity type.

A method for forming an electrostatic discharge (ESD) protection structure comprising:

• implanting in a substrate of a first conductivity type dopants of a second conductivity type to form a deep well in a first area of the substrate;
• implanting in the substrate dopants of the second conductivity type to form both a first region extending into the substrate to the deep well and a second elongated region that extends into the substrate to the deep well, thereby dividing the first area into first and second subareas;
• forming a contact to the substrate in the first subarea between the first region and the second elongated region;
• forming an insulating layer on the substrate;
• forming a plurality of gate fingers on the insulating layer within the second subarea;
• and
• forming source and drain regions in the substrate between the gate fingers.