Semiconductor structure

A semiconductor structure, comprising:

• a substrate, having a cell area and a periphery area;
• a charge storage structure, disposed on the substrate in the cell area, wherein the charge storage structure comprises a gate oxide layer, a floating gate, an inter-gate dielectric layer and a control gate sequentially disposed on the substrate;
• a resistor, disposed on the substrate in the periphery area, wherein the resistor comprises an oxide layer and a first conductive layer sequentially disposed on the substrate;
• a dielectric layer and a second conductive layer, sequentially disposed on the resistor, wherein the dielectric layer and the second conductive layer constitutes a salicide block (SAB) layer, and wherein the second conductive layer and the control gate are made of the same material;
• a shallow trench isolation structure, disposed in the substrate below the resistor;
• a first spacer, disposed on a sidewall of the charge storage structure;
• a second spacer, disposed on a sidewall of the resistor;
• a third spacer, disposed on a sidewall of the SAB layer;
• and
• at least two doped regions, disposed in the substrate beside the charge storage structure.