Integrated circuits and fabrication methods thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorChung-Hui Chen
Life of this patent
Estimating the term…
Abstract
An integrated circuit includes a signal line routed in a first direction. A first shielding pattern is disposed substantially parallel with the signal line. The first shielding pattern has a first edge having a first dimension and a second edge having a second dimension. The first edge is substantially parallel with the signal line. The first dimension is larger than the second dimension. A second shielding pattern is disposed substantially parallel with the signal line. The second shielding pattern has a third edge having a third dimension and a fourth edge having a fourth dimension. The third edge is substantially parallel with the signal line. The third dimension is larger than the fourth dimension. The fourth edge faces the second edge. A first space is between the second and fourth edges.
Claims20
An integrated circuit, comprising:
- a signal line routed in a first direction;
- a first shielding pattern being disposed substantially parallel with the signal line, the first shielding pattern having a first edge having a first dimension along the first direction and a second edge having a second dimension along a second direction different from the first direction, the first dimension being larger than the second dimension;
- and
- a second shielding pattern being disposed substantially parallel with the signal line, the second shielding pattern having a third edge having a third dimension along the first direction and a fourth edge having a fourth dimension along the second direction, the third dimension being larger than the fourth dimension, the fourth edge facing the second edge in the first direction, and the first and second shielding patterns being separated by a dielectric material in the first direction.
An integrated circuit comprising:
- a signal line routed in a first direction, the signal line being disposed in a first metallization layer;
- and
- a plurality of shielding structures disposed substantially parallel with the signal line, the shielding structures being disposed in a second metallization layer that adjoins the first metallization layer, the shielding structures each having a plurality of shielding patterns, the shielding patterns each having a first edge having a first dimension along the first direction and a second edge having a second dimension along a second direction different from the first direction, the first dimension being larger than the second dimension, and at least two of the shielding patterns being separated from each other in the first direction by a dielectric material.
A method of forming an integrated circuit, the method comprising:
- forming a signal line routed in a first direction;
- and
- forming a first shielding pattern and a second shielding pattern being substantially parallel with the signal line, wherein the first shielding pattern has a first edge having a first dimension along the first direction and a second edge having a second dimension along a second direction different from the first direction, the first dimension is larger than the second dimension, the second shielding pattern has a third edge having a third dimension along the first direction and a fourth edge having a fourth dimension along the second direction, the third dimension is larger than the fourth dimension, the fourth edge faces the second edge in the first direction, and the first and second shielding patterns are separated by a dielectric material in the first direction.
Dependencies are inferred from the claim text.