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US 8,803,290 B2Granted
Double broken seal ring
AssigneeQUALCOMM Incorporated
InventorsNorman Frederick, Jr., Tom Myers
Life of this patent
Estimating the term…
Abstract
The amount of signal propagation and moisture penetration and corresponding reliability problems due to moisture penetration degradation in an IC can be reduced by fabricating two seal rings with non-adjacent gaps. In one embodiment, the same effect can be achieved by fabricating a wide seal ring with a channel having offset ingress and egress portions. Either of these embodiments can also have grounded seal ring segments which further reduce signal propagation.
Claims20
A sealing system for an integrated circuit, comprising:
- a first seal ring circumscribing the integrated circuit, the first seal ring including at least one gap;
- a second seal ring circumscribing the first seal ring, the second seal ring including at least one gap offset from the at least one gap of the first seal ring;
- and
- a doped area under each gap having a dopant concentration that is lower than a dopant concentration directly beneath any portion of the first and second seal rings, said doped areas, increasing resistivity to signal propagation across each gap.
1 more element
A sealing system for an integrated circuit (IC), comprising:
- a first seal means circumscribing the integrated circuit, the first seal means including at least one gap;
- a first doped channel having a first dopant concentration underlying and following a path of the first seal means;
- and
- a second seal means circumscribing the first seal means, the second seal means including at least one gap offset from the at least one gap of the first seal means;
- a second doped channel having a second dopant concentration underlying and following a path of the second seal means,
- wherein at least one gap portion of the first doped channel underlies the at least one gap of the first seal means and has a dopant concentration less than the first dopant concentration.
3 more elements
An integrated circuit with a sealing system, comprising:
- a substrate including a first doped channel having a first dopant concentration, the first doped channel including a gap portion having a dopant concentration less than the first dopant concentration;
- a first seal ring circumscribing the integrated circuit overlying and following a path of the first doped channel, the first seal ring including at least one gap overlying the gap portion of the first doped channel;
- and
- a second seal ring circumscribing the first seal ring.
1 more element
A method for forming a sealing system for an integrated circuit, comprising:
- providing a substrate;
- forming a first doped channel in the substrate having a first dopant concentration, the first doped channel including at least one gap portion having a dopant concentration less than the first dopant concentration;
- forming a second doped channel in the substrate having a second dopant concentration, the second doped channel including at least one gap portion having a dopant concentration less than the second dopant concentration;
- forming a first seal ring circumscribing the integrated circuit overlying and following the first doped channel, the first seal ring including at least one gap overlying the at least one gap portion of the first doped channel;
- and
- forming a second seal ring circumscribing the first seal ring overlying and following the second doped channel, the second seal ring including at least one gap offset from the at least one gap of the first seal ring and overlying the at least one gap portion of the second doped channel.
3 more elements
A sealing system for an integrated circuit, comprising:
- a substrate;
- a first doped channel following a first path along the substrate, the first doped channel having a first dopant concentration and having at least one gap, a dopant concentration of the at least one gap being different than the first dopant concentration;
- a first seal ring circumscribing the integrated circuit and overlying and following the first doped channel, the first seal ring including at least one gap overlying the at least one gap in the first doped channel;
- a second doped channel following a second path along the substrate, circumscribing the first doped path, the second doped channel having a second dopant concentration and having at least one gap, a dopant concentration of the at least one gap of the second doped channel being different than the second dopant concentration;
- a second seal ring circumscribing the first seal ring and overlying and following the second doped channel, the second seal ring including at least one gap offset from the at least one gap of the first seal ring and overlying the at least one gap in the second doped channel.
2 more elements
A method for forming a sealing system for an integrated circuit, comprising:
- steps for providing a substrate;
- steps for forming a first doped channel in the substrate having a first dopant concentration, the first doped channel including at least one gap portion having a dopant concentration less than the first dopant concentration;
- steps for forming a second doped channel in the substrate having a second dopant concentration, the second doped channel including at least one gap portion having a dopant concentration less than the second dopant concentration;
- steps for forming a first seal ring circumscribing the integrated circuit overlying and following the first doped channel, the first seal ring including at least one gap overlying the at least one gap portion of the first doped channel;
- and
- steps for forming a second seal ring circumscribing the first seal ring overlying and following the second doped channel, the second seal ring including at least one gap offset from the at least one gap of the first seal ring and overlying the at least one gap portion of the second doped channel.
3 more elements
Dependencies are inferred from the claim text.