Thin film transistor including buffer layers with high resistivity
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorShunpei Yamazaki
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Abstract
A transistor in a display device is expected to have higher withstand voltage, and it is an object to improve the reliability of a transistor which is driven by high voltage or large current. A semiconductor device includes a transistor in which buffer layers are provided between a semiconductor layer forming a channel formation region and source and drain electrode layers. The buffer layers are provided between the semiconductor layer forming a channel formation region and the source and drain electrode layers in order to particularly relieve an electric field in the vicinity of a drain edge and improve the withstand voltage of the transistor.
Claims13
A semiconductor device comprising:
- a transistor comprising:
- a gate electrode layer;
- a gate insulating layer over the gate electrode layer;
- a semiconductor layer comprising a channel formation region over the gate insulating layer;
- a buffer layer comprising an oxide of indium, a silicon oxide, and an oxide of tin over the semiconductor layer;
- and
- a source electrode layer and a drain electrode layer over the buffer layer,
- wherein the semiconductor layer is an oxide semiconductor layer,
- wherein the semiconductor layer is electrically connected to the source electrode layer and the drain electrode layer through the buffer layer, and
- wherein a percentage of the silicon oxide contained in the buffer layer is higher than or equal to 1 wt % and lower than or equal to 20 wt %.
A semiconductor device comprising:
- a transistor comprising:
- a gate electrode layer;
- a gate insulating layer over the gate electrode layer;
- a semiconductor layer comprising a channel formation region over the gate insulating layer;
- a buffer layer comprising an oxide of indium, a silicon oxide, and an oxide of tin over the semiconductor layer;
- and
- a source electrode layer and a drain electrode layer over the buffer layer,
- wherein the semiconductor layer is an oxide semiconductor layer,
- wherein the buffer layer is a metal oxide layer whose resistivity is higher than 1 Ωcm,
- wherein the semiconductor layer is electrically connected to the source electrode layer and the drain electrode layer through the buffer layer, and
- wherein a percentage of the silicon oxide contained in the buffer layer is higher than or equal to 1 wt % and lower than or equal to 20 wt %.
A semiconductor device comprising:
- a transistor comprising:
- a gate electrode layer;
- a gate insulating layer over the gate electrode layer;
- a semiconductor layer comprising a channel formation region over the gate insulating layer;
- first and second buffer layers over the semiconductor layer;
- and
- a source electrode layer and a drain electrode layer over the first and second buffer layers,
- wherein the semiconductor layer is an oxide semiconductor layer,
- wherein the semiconductor layer is electrically connected to one of the source electrode layer and the drain electrode layer through one of the first and second buffer layers,
- wherein one of the first and second buffer layers is a metal oxide layer whose resistivity is higher than 1 Ωcm,
- wherein the first and second buffer layers are metal oxide layers each comprising an oxide of indium, a silicon oxide, and an oxide of tin, and
- wherein a percentage of the silicon oxide contained in one of the first and second buffer layers is higher than or equal to 1 wt % and lower than or equal to 20 wt %.
Dependencies are inferred from the claim text.