System and method for improving reliability in a semiconductor device
AssigneeSpansion LLC
InventorsYider Wu, Unsoon Kim, Kuo-Tung Chang, Harpreet Sachar
Life of this patent
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Abstract
A method for forming a memory device is provided. A nitride layer is formed over a substrate. The nitride layer and the substrate are etched to form a trench. The memory device is pre-cleaned to prepare a surface of the memory device for oxide formation thereon, where cleaning the memory device removes portions of the barrier oxide layer on opposite sides of the trench. The nitride layer is trimmed on opposite sides of the trench. A liner oxide layer is formed in the trench.
Claims12
A method for forming a memory device, the method comprising:
- forming a barrier oxide layer over a substrate;
- forming a nitride layer over the barrier oxide layer;
- etching the nitride layer, the barrier oxide layer and the substrate to form a trench,
- the trench including sidewalls that slope inward from an upper surface of the nitride layer;
- pre-cleaning the memory device to prepare an exposed surface of the sidewalls of the trench for oxide formation thereon,
- pre-cleaning the memory device including:
- removing first portions of the barrier oxide layer on opposite sides of the trench to reduce a width of the barrier oxide layer,
- the first portions of the barrier oxide layer undercutting portions of the nitride layer;
- trimming, after pre-cleaning the memory device, the nitride layer to remove portions of the nitride layer on opposite sides of the trench and to expose second portions of the barrier oxide layer on the opposite sides of the trench,
- the exposed second portions of the barrier oxide layer being adjacent to the sidewalls,
- a distance that the nitride layer is trimmed being less than a width of the nitride layer,
- the distance that the nitride layer is trimmed being between about 500 Å and about 2000 Å, and
- the width of the nitride layer being between about 1000 Å and about 1700 Å,
- trimming the nitride layer after pre-cleaning the memory device preserving an integrity of a region of the substrate adjacent to the sidewalls, and
- the first portions of the barrier oxide layer being different from the second portions of the barrier oxide layer;
- forming a liner oxide layer on the sidewalls of the trench;
- filling the trench with a field oxide material over the liner oxide layer;
- planarizing the field oxide material to form a planar top surface that is aligned with a top surface of the trimmed nitride layer;
- stripping the trimmed nitride layer to form a mesa from the field oxide material,
- the mesa extending above a top of the trench,
- stripping the trimmed nitride layer exposing third portions of the barrier oxide layer positioned beneath the nitride layer,
- the third portions of the barrier oxide layer being different from the first portions of the barrier oxide layer and the second portions of the barrier oxide layer;
- and
- cleaning the memory device to strip the barrier oxide layer and to remove portions of the field oxide layer,
- removing the portions of the field oxide layer reducing a width of the mesa, and
- cleaning the memory device including:
- forming a fourth oxide layer on the substrate adjacent the mesa, and
- removing the fourth oxide layer,
- removing the fourth oxide layer reducing the reduced width of the mesa.
A method for fabricating a semiconductor device, the method comprising:
- forming a first oxide layer over a substrate;
- depositing a nitride layer over the first oxide layer;
- patterning a photoresist material to form a trench mask over the nitride layer;
- etching at least one isolation trench within the substrate, first oxide layer, and nitride layer,
- the at least one isolation trench including sidewalls that slope inward from an upper surface of the nitride layer;
- removing the trench mask;
- pre-cleaning the semiconductor device to remove portions of the first oxide layer on opposite sides of the at least one isolation trench to reduce a width of the first oxide layer,
- the removed portions of the first oxide layer undercutting portions of the nitride layer, and
- the width of the first oxide layer being reduced less than a thickness of the first oxide layer;
- removing at least a portion of the nitride layer adjacent to the sidewalls of the at least one isolation trench, after pre-cleaning the semiconductor device, to widen a portion of the isolation trench,
- removing the at least the portion of the nitride layer adjacent to the sidewalls after pre-cleaning the semiconductor device preserving an integrity of a region of the substrate adjacent to the sidewalls;
- forming a second oxide layer on the sidewalls of the at least one isolation trench;
- filling the at least one isolation trench with a third oxide material;
- planarizing the third oxide material to form a planar top surface that is aligned with a top surface of the nitride layer;
- removing the nitride layer to expose remaining sections of the first oxide layer and to form at least one mesa,
- the at least one mesa extending above a top of the at least one trench;
- and
- cleaning the semiconductor device to strip the first oxide layer and to remove portions of the third oxide layer,
- removing the portions of the third oxide layer reducing a width of the at least one mesa, and
- cleaning the semiconductor device including:
- forming a fourth oxide layer on the substrate adjacent the at least one mesa, and
- removing the fourth oxide layer,
- removing the fourth oxide layer reducing the reduced width of the mesa.
Dependencies are inferred from the claim text.