Semiconductor device package

A method for forming a packaged semiconductor device, the method comprising:

• attaching a downset portion of a heat spreader to a top surface of a semiconductor die with a thermal interface material, wherein the semiconductor die is attached to a carrier, and wherein the downset portion of the heat spreader attached to the surface of the semiconductor die defines an encapsulant exclusion region on the top surface of the semiconductor die;
• placing the heat spreader, semiconductor die, and carrier into a mold cavity having an injection port;
• and
• flowing an encapsulant over the semiconductor die and carrier from the injection port to surround the downset portion of the heat spreader and cover exposed portions of the semiconductor die and at least a portion of the carrier, wherein the encapsulant exclusion region has a first length corresponding to a single longest distance across the encapsulant exclusion region, wherein the first length is aligned, within 30 degrees, to a line defined by a shortest distance between an entry point of the injection port into the mold cavity and an outer perimeter of the encapsulant exclusion region, and wherein the packaged semiconductor device is devoid of encapsulant between the downset portion of the heat spreader and the top surface of the semiconductor die.

A packaged semiconductor device, comprising:

• a die carrier;
• a semiconductor die attached to the die carrier;
• a heat spreader having a downset portion attached to a top surface of the semiconductor die, wherein the downset portion has a bottom surface facing the top surface of the semiconductor die and is located within an outer perimeter of the top surface of the semiconductor die;
• and
• an encapsulant over the semiconductor die and the carrier and surrounding the downset portion of the heat spreader, wherein the packaged semiconductor device includes an area devoid of encapsulant between the bottom surface of the downset portion and the top surface of the semiconductor die, wherein the bottom surface of the downset portion has a first length corresponding to a single longest distance across the bottom surface of the downset portion, and wherein the first length is aligned, within 30 degrees, to a diagonal axis of the packaged semiconductor device.