Diffusion barrier for oppositely doped portions of gate conductor

A method comprising:

• patterning a polysilicon gate over two immediately adjacent, opposite polarity transistor devices;
• patterning a mask over said polysilicon gate, said mask having an opening in a location where said opposite polarity transistor devices abut one another;
• forming sidewall spacers in said opening;
• removing a portion of said polysilicon gate through said opening to form a recess in said polysilicon gate, said recess separating said polysilicon gate into a first polysilicon gate and a second polysilicon gate;
• after forming said recess, doping said first polysilicon gate using a first polarity dopant;
• and
• after forming said recess, doping said second polysilicon gate using a second polarity dopant having an opposite polarity of said first polarity dopant.

A method comprising:

• patterning a polysilicon gate over two immediately adjacent, opposite polarity transistor devices;
• removing a portion of said polysilicon gate from a location where said opposite polarity transistor devices abut one another to form a partial recess in said polysilicon gate, said partial recess separating said polysilicon gate into a first polysilicon gate and a second polysilicon gate, said recess being positioned between said first polysilicon gate and said second polysilicon gate, said recess having a reduced thickness relative to said first polysilicon gate and said second polysilicon gate, and said removing said portion of said polysilicon gate avoiding forming an opening completely through said polysilicon gate to form said partial recess;
• after forming said partial recess, doping said first polysilicon gate using a first polarity dopant;
• and
• after forming said partial recess, doping said second polysilicon gate using a second polarity dopant having an opposite polarity of said first polarity dopant.