Method and apparatus for efficiently processing an integrated circuit layout
AssigneeCadence Design Systems, Inc.
InventorsKimiko Umino, David C. Noice
Life of this patent
Estimating the term…
Abstract
A method for efficiently processing a design layout is described. In some embodiments, the method receives an original design layout and a modified design layout. The method identifies a change from the original design layout to the modified design layout by comparing the original and modified design layouts. The method of some embodiments then defines a region based on the location of the identified change within the modified design layout. The method performs a design operation (e.g., placing fills) only on the identified region of the modified design layout.
Claims21
A computer-implemented method for performing a design operation on a circuit design layout, the method comprising:
- at a computer, receiving a first design layout comprising a first set of shapes and a second design layout comprising a second set of shapes and a plurality of sections;
- comparing the first design layout with the second design layout to identify an area of the second design layout that differs from a corresponding area of the first design layout in that one of the areas comprises a portion of a shape that the other area does not have;
- identifying a set of the sections of the second design layout which include the identified area of the second design layout;
- and
- performing a design operation only on the identified set of sections of the second design layout.
A non-transitory machine readable medium storing a program for performing design operations on a circuit design layout, the program comprising sets of instructions for:
- modifying a first set of shapes of an original circuit design layout to generate a modified circuit design layout comprising a second set of shapes and a plurality of sections;
- comparing the original circuit design layout with the modified circuit design layout to identify a set of sections of the modified circuit design layout, said set of sections including a portion of a shape in the modified circuit design layout that has been changed from the original circuit design layout;
- and
- performing a set of metal fill placement operations only on the identified set of sections of the modified circuit design layout.
A system comprising:
- a processor for executing sets of instructions;
- and
- a memory for storing a computer program for performing design operations, the program comprises sets of instructions for:
- storing a copy of a circuit design layout before a shape in a circuit design layout is modified;
- identifying sections of the modified circuit design layout that contain the modified shape by comparing the modified circuit design layout with the stored copy of the circuit design layout;
- and
- performing a set of design rule checking (DRC) operations only on set of sections of the circuit design layout that include the identified location.
Dependencies are inferred from the claim text.