Bit stream aliasing in memory system with probabilistic decoding

A memory system, comprising:

• a memory array;
• a data register defined and connected to receive and store a first bit stream from the memory array;
• an aliasing module defined and connected to receive the first bit stream from the data register and alias the first bit stream as a second bit stream, the aliasing module defined and connected to transmit the second bit stream in lieu of the first bit stream;
• a data bus connected to receive the second bit stream transmitted from the aliasing module;
• a de-aliasing module connected to receive the second bit stream transmitted over the data bus from the aliasing module and de-alias the second bit stream back to the first bit stream;
• and
• an external controller including an error correction code decoder connected to receive the first bit stream from the de-aliasing module.

A method for operating a memory system, comprising:

• reading a first bit stream from a storage element in a memory array;
• aliasing the first bit stream as a second bit stream;
• transmitting the second bit stream over a data bus to an external memory controller in lieu of the first bit stream;
• de-aliasing the second bit stream back to the first bit stream upon arrival of the second bit stream at the external memory controller;
• and
• providing the first bit stream to an error correction code decoder at the external memory controller.