Customizing code modules of software and programmable hardware for a test instrument

A non-transitory, computer accessible memory medium storing program instructions for customizing a test instrument, wherein the program instructions are executable to:

• provide a plurality of pairs of code modules and an application programming interface (API) for interacting with the plurality of pairs of code modules, wherein each pair of code modules comprises a first code module having program instructions for execution by a processor of the test instrument and a second code module for implementation on a programmable hardware element of the test instrument, wherein, for each pair of code modules, the first code module and the second code module collectively implement a function in the test instrument, wherein the first code module of a pair of code modules is executable on the processor to perform a first portion of a function, and wherein the second code module of the pair of code modules is configured to be implemented on the programmable hardware element to perform a corresponding second portion of the function;
• receive user input specifying modification of a second code module of at least one of the plurality of pairs of code modules;
• and
• generate a hardware description for the programmable hardware element of the test instrument based on the modified second code module.

A method for customizing a test instrument, comprising:

• providing a library of pairs of code modules and an application programming interface (API) for interacting with the plurality of pairs of code modules, wherein each pair of code modules comprises a processor-side code module having program instructions for execution by a processor of the test instrument and a PHE-side code module for implementation on a programmable hardware element (PHE) of the test instrument;
• wherein, for each pair of code modules, the processor-side code module and the PHE-side code module collectively implement a function in the test instrument, wherein the processor-side code module of a pair of code modules is executable on the processor to perform a first portion of a function, and wherein the PHE-side code module of the pair of code modules is configured to be implemented on the programmable hardware element to perform a corresponding second portion of the function;
• displaying a first graphical data flow program configured to execute on the processor of the test instrument, wherein the first graphical data flow program comprises a plurality of processor-side code modules;
• and
• displaying a second graphical data flow program configured to execute on the programmable hardware element of the test instrument, wherein the second graphical data flow program comprises a corresponding plurality of PHE-side code modules corresponding to the plurality of processor-side code modules in the first graphical data flow program;
• wherein changes to a respective PHE-side code module of a pair does not affect other pairs of code modules in the first and second graphical data flow programs.

A method for customizing a test instrument, comprising:

• providing a library of pairs of code modules and an application programming interface (API) for interacting with the plurality of pairs of code modules, wherein each pair of code modules comprises a processor-side code module having program instructions for execution by a processor of the test instrument and a PHE-side code module for implementation on a programmable hardware element (PHE) of the test instrument;
• wherein, for each pair of code modules, the processor-side code module and the PHE-side code module collectively implement a function in the test instrument, wherein the processor-side code module of a pair of code modules is executable on the processor to perform a first portion of a function, and wherein the PHE-side code module of the pair of code modules is configured to be implemented on the programmable hardware element to perform a corresponding second portion of the function;
• displaying a first graphical data flow program configured to execute on the processor of the test instrument, wherein the first graphical data flow program comprises first and second processor-side code modules;
• displaying a second graphical data flow program configured to execute on the programmable hardware element of the test instrument, wherein the second graphical data flow program comprises corresponding first and second PHE-side code modules corresponding to the first and second processor-side code modules in the first graphical data flow program;
• wherein the first processor-side code module and the first PHE-side code module correspond to a first pair of code modules, and wherein the second processor-side code module and the second PHE-side code module correspond to a second pair of code modules;
• receiving user input specifying modification of the first PHE-side code module in the second graphical data flow program;
• wherein the second PHE-side code module is not affected by the modification of the first PHE-side code module;
• and
• generating a hardware description for the programmable hardware element of the test instrument based on the modified first PHE-side code module and the second PHE-side code module;
• wherein the first and second pairs of code modules are executable on the processor and the programmable hardware element, respectively, to perform a test operation on a system under test (SUT).