Instruction issue to plural computing units from plural stream buffers based on priority in instruction order table

A method for use in a processor including L computing units, L being an integer of 2 or greater,

• the processor comprising:
• an instruction buffer including M×Z instruction storage areas each storing one instruction, M instruction streams being input in a state of being distinguished from each other, each of the M instruction streams including Z instructions, M being an integer of 2 or greater, Z being an integer of 2 or greater, M×Z being equal to or greater than L;
• and
• an order information holding unit holding M×Z pieces of order information that indicate an order of the M×Z instruction storage areas of the instruction buffer,
• the method comprising the steps of:
• extracting instructions from the M×Z instruction storage areas of the instruction buffer;
• and
• causing the extracting step to extract L instructions in executable state from the M×Z instruction storage areas in accordance with the order indicated by the order information held by the order information holding unit, and inputting the extracted L instructions into different ones of the L computing units.