Memory on-demand, managing power in memory
AssigneeMarvell World Trade Ltd.
InventorsOfer Zaarur, Jason Chagas
Life of this patent
Estimating the term…
Abstract
A memory controller for managing data and power in a memory is described. In some implementations, the memory controller is configured to identify a first area of the memory to be operated at a first power level, identify a second area of the memory to be operated at a second power level, transfer data in a region in the second area to a region in the first area, maintain a mapping of an address associated with the region in the second area to an address associated with the region in the first area, operate the first area at the first power level, and operate the second area at the second power level.
Claims24
A method, comprising:
- identifying a first area of a memory to be operated at a first power level;
- identifying a second area of the memory to be operated at a second power level, the first power level being higher than the second power level;
- transferring data in a region in the second area to a region in the first area, the region in the second area being a region that is frequently accessed by a processing device;
- maintaining a mapping of an address associated with the region in the second area to an address associated with the region in the first area;
- operating the first area at the first power level;
- and
- operating the second area at the second power level.
An apparatus, comprising:
- memory distribution management circuitry coupled with a memory, the memory distribution management circuitry configured to:
- identify a first area of the memory to be operated at a first power level,
- identify a second area of the memory to be operated at a second power level, the first power level being higher than the second power level, and
- transfer data in a region in the second area to a region in the first area, the region in the second area being a region that is frequently accessed by a processing device;
- a translation structure coupled with the memory distribution management circuitry, the translation structure configured to store a mapping of an address associated with the region in the second area to an address associated with the region in the first area;
- and
- a power management circuitry coupled with the memory distribution management circuitry and the memory, the power management circuitry configured to:
- operate the first area at the first power level, and
- operate the second area at the second power level.
A system, comprising:
- a processing device;
- a memory;
- and
- a memory controller configured to:
- identify a first area of the memory to be operated at a first power level,
- identify a second area of the memory to be operated at a second power level, the first power level being higher than the second power level,
- transfer data in a region in the second area to a region in the first area, the region in the second area being a region that is frequently accessed by the processing device;
- maintain a mapping of an address associated with the region in the second area to an address associated with the region in the first area,
- operate the first area at the first power level, and
- operate the second area at the second power level.
Dependencies are inferred from the claim text.