Buffer control system and method for a memory system having outstanding read and write request buffers
AssigneeMicron Technology, Inc.
InventorJoseph Jeddeloh
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AssigneeMicron Technology, Inc.
InventorJoseph Jeddeloh
Estimating the term…
A memory controller and method for managing the issuance of read and write requests to a system memory is provided. The number of outstanding read requests and write requests issued to the system memory are separately monitored and further issuance of read and write requests to the system memory is separately controlled based on the number of outstanding read and write requests, respectively. For example, the issuance of read and write requests can be managed by halting and resuming the issuance of read and write requests to the system memory to maintain the number of outstanding read requests between first and second read thresholds and to maintain the number of outstanding write requests between first and second write thresholds, respectively.
A memory controller for use with a system memory, the memory controller comprising:
An apparatus, comprising:
An apparatus, comprising:
Dependencies are inferred from the claim text.