Circuit for and method of enabling the transfer of data by an integrated circuit

A circuit for enabling the transfer of data by an integrated circuit device, the circuit comprising:

• a non-volatile memory array coupled to receive a clock signal and having a plurality of memory elements storing data;
• a control circuit coupled to the non-volatile memory array, the control circuit enabling uni-directional transfer of data on a plurality of signal lines between the non-volatile memory array and the control circuit in a first mode and bi-directional transfer of data on the plurality of signal lines between the non-volatile memory array and the control circuit in a second mode;
• a first buffer coupled to the non-volatile memory array, the first buffer receiving data transferred in the first mode;
• and
• a second buffer coupled to the non-volatile memory array, the second buffer receiving data transferred in the second mode;
• wherein the control circuit controls the transfer of data in the second mode on both the rising and falling edges of the clock signal.

A method of enabling the transfer of data by an integrated circuit device, the method comprising:

• enabling the bi-directional communication of data between a non-volatile memory array and a circuit of the integrated circuit using a plurality of signal lines;
• receiving a command to transfer data at a high data rate with the non-volatile memory array;
• receiving a clock signal for transferring the data with the non-volatile memory array;
• enabling dual edge operation of a buffer coupled to the non-volatile memory array during the high data rate transfer of data with the non-volatile memory array;
• and
• transferring the data on the plurality of signal lines between the non-volatile memory array and the circuit using both a rising edge and a falling edge of the clock signal.