Independently controlled virtual memory devices in memory modules
AssigneeHewlett-Packard Development Company, L.P.
InventorsJung Ho Ahn, Norman P. Jouppi, Jacob B. Leverich
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Abstract
Various embodiments of the present invention are directed a multi-core memory modules. In one embodiment, a memory module (500) includes at least one virtual memory device and a demultiplexer register (502) disposed between the at least one virtual memory device and a memory controller. The demultiplexer register receives a command identifying one of the at least one virtual memory devices from the memory controller and sends the command to the identified virtual memory device. In addition, the at least one virtual memory devices include at least one memory chip.
Claims13
A memory module comprising:
- at least one virtual memory device including at least one memory chip;
- and
- a demultiplexer register electronically connected to the at least one virtual memory device and a memory controller, wherein the demultiplexer register comprises:
- a register configured to receive a command identifying one of the at least one virtual memory device from the memory controller and determine a virtual memory device address of the virtual memory device identified in the command;
- a demultiplexer configured to receive the command and the address from the register and select a set of signals over which to send the command to the virtual memory device identified in the command;
- and
- a counter that translates a command into multiple commands so that a cache line can be partitioned into cache-line segments by the demultiplexer register, wherein each command is associated with one of the cache-line segments.
A method for controlling a memory module comprising at least one virtual memory device, the method comprising:
- preparing a command at a memory controller to include an address corresponding to one of the at least one virtual memory devices;
- sending the command from the memory controller to a demultiplexer register of the memory module;
- determining which of the at least one virtual memory devices is identified by the address using a register of the demultiplexer register;
- translating the command into multiple commands using a counter of the demultiplexer register so that a cache line can be partitioned into cache-line segments by the demultiplexer register, wherein each of the multiple commands is associated with one of the cache-line segments;
- and
- sending the multiple commands and associated cache-line segments to the virtual memory device identified by the address using a demultiplexer of the demultiplexer register.
Dependencies are inferred from the claim text.