Method of addition with multiple operands, corresponding adder and computer program product

An addition device for adding a plurality of input binary numbers each represented by a digital signal of N bits, wherein the device comprises:

• inputs configured to receive the digital signals representing the plurality of input binary numbers;
• at least one accumulation device configured to carry out, each time that it is activated, one iteration, of index i+1 with i≧0, of an accumulation mechanism, each accumulation device comprising estimation means selected from the group consisting of:
• first estimation means for generating an estimation signal Ui+1 on N bits, and first correction means for generating a first correction signal Ri+1 on N bits, said first estimation means and said first correction means comprising means for implementing the following first set of equations:
• {
• U
• n
• i
• +
• 1
• =
• U
• n
• i
• ⊕
• R
• n
• i
• ⊕
• U
• n
• -
• 1
• i
• ⊕
• c
• n
• R
• n
• +
• 1
• i
• +
• 1
• =
• (
• U
• n
• i
• ⊕
• R
• n
• i
• ⊕
• U
• n
• -
• 1
• i
• )
• ·
• (
• U
• n
• i
• ⊕
• c
• n
• )
• and second estimation means for generating an estimation signal Ui+1 on N bits, and second correction means for generating a second correction signal Hi+1 on N bits, said second estimation means and said second correction means comprising means for implementing the following second set of equations:
• {
• U
• n
• i
• +
• 1
• =
• U
• n
• i
• ⊕
• H
• n
• i
• ⊕
• c
• n
• H
• n
• +
• 1
• i
• +
• 1
• =
• (
• U
• n
• i
• ⊕
• H
• n
• i
• )
• ·
• (
• U
• n
• i
• ⊕
• c
• n
• _
• )
• ⊕
• c
• n
• with:
• Ui+1n:
• value of the bit of rank n of said estimation signal Ui+1, with 0≦n≦N−1, obtained during said iteration of index i+1;
• Uin:
• a value of the bit of rank n of an estimation signal Ui, obtained during a preceding iteration of index i if i>0, or a determined initialization value U0n of the bit of rank n of an estimation signal Ui if i=0;
• Uin−1:
• a value of the bit of rank n−1 of said estimation signal Ui, obtained during a preceding iteration of index i if n>0 and if i>0,
• or a determined initialization value U0n−1 of the bit of rank n−1 of said estimation signal Ui if n>0 and if i=0;
• or a predetermined initialization value of an fictive bit of rank n−1 of said estimation signal Ui if n=0;
• Rin:
• a value of the bit of rank n of a first correction signal Ri, obtained during a preceding iteration of index i if n>0,
• or a predetermined initialization value of the bit of rank n of said first correction signal Ri if n=0;
• Ri+1n+1:
• a value of the bit of rank n+1 of said first correction signal Ri+1, obtained during said iteration of index i+1;
• Hin:
• a value of the bit of rank n of a second correction signal Hi, obtained during a preceding iteration of index i;
• Hi+1n+1:
• a value of the bit of rank n+1 of said second correction signal Hi+1, obtained during said iteration of index i+1;
• Cn:
• a value of the bit of rank n of an input binary number C included in said plurality of input binary numbers and taken into account in said addition during said iteration of index i+1,
• the estimation signal Ui and the first correction signal Ri or the second correction signal Hi representing a sum of at least two binary numbers of the plurality of input binary numbers in redundant form, the estimation signal Ui+1 and the first correction signal Ri+1 or the second correction signal Hi+1, representing the sum of said at least two binary numbers in redundant form and of the binary number c, wherein the last iteration of Un is the sum Sn of the bit of rank n.