Decimal elementary functions computation

A system for executing a decimal elementary function (DEF) computation from a first decimal floating-point operand (DFPO) operand and a second DFPO, comprising:

• an input processing hardware unit (IPHU) configured to:
• generate a first normalized mantissa from a first mantissa extracted from the first DFPO based on a number of leading zeros in the first mantissa;
• and
• generate a second normalized mantissa from a second mantissa extracted from the second DFPO based on a number of leading zeros in the second mantissa;
• a decimal logarithm hardware unit (DLHU) configured to calculate a plurality of approximations for a logarithm of the first normalized mantissa using a first digit recurrence algorithm;
• a decimal multiplier hardware unit (DMHU) configured to calculate a plurality of approximations for a product of the second normalized mantissa and a first sum using the plurality of approximations for the logarithm,
• wherein the first sum is based on the logarithm of the first normalized mantissa and a first biased exponent extracted from the first DFPO;
• a shifter configured to generate a plurality of shifted values by shifting the plurality of approximations for the product based on a second biased exponent extracted from the second DFPO;
• a decimal antilogarithm hardware unit (DAHU) configured to calculate, using a second digit recurrence algorithm, an antilog based on a plurality of fraction components generated from the plurality of shifted values;
• and
• an output formulation hardware unit configured to generate a decimal floating-point result of the DEF comprising a resultant mantissa based on the antilog and a resultant biased exponent based on at least one integer component of at least one of the plurality of shifted values.

A system for calculating a logarithm of a decimal floating-point operand (DFPO) to a base (B), comprising:

• an input processing hardware unit (IPHU) configured to:
• extract a mantissa and a biased exponent from the DFPO;
• and
• generate a normalized mantissa by shifting the mantissa based on a number of leading zeros in the mantissa;
• a decimal logarithm hardware unit (DLHU) configured to calculate a plurality of approximations for a logarithm of the normalized mantissa to base 10 using a digit recurrence algorithm;
• a decimal multiplier hardware unit (DMHU) configured to calculate a product of a sum and an inverse of a logarithm of B to base 10 using the plurality of approximations, wherein the sum is based on the biased exponent and the logarithm of the normalized mantissa to base 10;
• and
• an output formulation hardware unit configured to generate a decimal floating-point result of the logarithm of the DFPO comprising a resultant mantissa based on the product and a resultant biased exponent based on the exponent and the number of leading zeros.

A system for calculating a base (B) raised to a decimal floating-point operand (DFPO), comprising:

• an input processing hardware unit configured to:
• extract a mantissa and a biased exponent from the DFPO;
• and
• generate a normalized mantissa by shifting the mantissa based on a number of leading zeros in the mantissa;
• a decimal multiplier hardware unit (DMHU) configured to calculate a product of the normalized mantissa and a logarithm of B to base 10;
• a shifter configured to generated a shifted value by shifting the product based on the biased exponent and the number of leading zeros;
• a decimal antilogarithm hardware unit (DAHU) configured to calculate an antilog of a fraction component of the shifted value using a digit recurrence algorithm;
• and
• an output formulation hardware unit (OFHU) configured to generate a decimal floating-point result comprising a resultant mantissa based on the antilog and a resultant biased exponent based on at least an integer component of the shifted value.