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US 8,787,376 B1Granted
Systems and methods for accessing a multi-bank SRAM
AssigneeJuniper Networks, Inc.
InventorGunes Aybay
Life of this patent
Estimating the term…
Abstract
A device may include multi-bank SRAM logic configured to receive an lookup result that includes a first number of addresses, parse each of the first number of addresses from the received lookup result, simultaneously provide at least one of the first number of parsed addresses to each of a first number of SRAMs, simultaneously read data from each of the first number of SRAMs and simultaneously transmit the read data from each of the first number of SRAMs.
Claims24
A device comprising:
- at least one processor to:
- store, in a plurality of static random access memories (SRAMs), respective portions of data associated with a flow,
- store, in a ternary content addressable memory (TCAM), that differs from the plurality of SRAMs, information identifying a plurality of addresses in the plurality of SRAMs,
- the plurality of addresses being associated with, respectively, the stored portions of the data,
- receive a packet,
- extract information from the packet,
- form, based on the extracted information, a lookup key,
- access, using the lookup key, the TCAM to acquire a lookup result that includes the information identifying a group of addresses, of the plurality of addresses,
- a quantity of addresses included in the group of addresses being equal to a quantity of SRAMs included in the plurality of SRAMs,
- parse the lookup result to identify the group of addresses,
- simultaneously access, using the group of addresses, the plurality of SRAMs, to simultaneously read the portions of the data from the plurality of SRAMs, and
- process the packet using the read portions of the data.
9 more elements
A method comprising:
- storing, by one or more processors and in a plurality of static random access memories (SRAMs), respective portions of data associated with a flow;
- storing, by the one or more processors and in a ternary content addressable memory (TCAM) that differs from the plurality of SRAMs, information identifying a plurality of addresses in the plurality of SRAMs,
- the plurality of addresses being associated with, respectively, the stored portions of the data;
- acquiring, by one or more processors, a lookup result that includes information identifying a group of addresses, of the plurality of addresses,
- a quantity of addresses included in the group of addresses being equal to a quantity of SRAMs included in the plurality of SRAMs;
- parsing, by one or more processors, the group of addresses from the lookup result;
- and
- simultaneously reading, by one or more processors, data from each of the plurality of SRAMs using the group of addresses.
5 more elements
A non-transitory computer readable medium storing instructions, the instructions comprising:
- one or more instructions which, when executed by a processor, cause the processor to store, in a plurality of static random access memories (SRAMs), respective portions of data associated with a flow;
- one or more instructions which, when executed by the processor, cause the processor to store, in a ternary content addressable memory (TCAM) that differs from the plurality of SRAMs, information identifying a plurality of addresses in the plurality of SRAMs associated with, respectively, the stored portions of the data;
- one or more instructions which, when executed by the processor, cause the processor to receive, from the TCAM, a lookup result that includes information identifying a group of addresses, of the plurality of addresses,
- a quantity of addresses included in the group of addresses being equal to a quantity of SRAMs included in the plurality of SRAMs;
- one or more instructions which, when executed by the processor, cause the processor to simultaneously access, based on the lookup result, the plurality of SRAMs to acquire the portions of the data;
- and
- one or more instructions which, when executed by the processor, cause the processor to simultaneously forward, to another processor, the portions of the data via a plurality of buses,
- the quantity of SRAMs being larger than a quantity buses, included in the plurality of buses.
5 more elements
Dependencies are inferred from the claim text.