Serial memory and IO access architecture and system for switched telecommunication and computing platforms

A computing and communication apparatus adapted for interconnection to the Internet, the apparatus comprising:

• a plurality of circuit cards which use packet frame switched full duplex serial communication for all external communications of the cards including memory and input/output accesses;
• and,
• a communication fabric providing packet frame switched full duplex serial communication over a backplane via a serial packet frame switching device to the said circuit cards;
• and,
• the said circuit cards and the said communication fabric are housed in a packaging arrangement;
• and,
• each of the said circuit cards is communicably interconnected via the said communication fabric serial packet frame switching device;
• and,
• each of the said circuit cards is communicably interconnected to the Internet via the said serial packet frame switching device;
• and,
• at least one of the said circuit cards includes a protocol processor which encapsulates the memory and input/output access including instruction access of the circuit card to serial packet frame to provide full duplex serial packet-based communication for the circuit card over the backplane at a speed in excess of one gigabits per second.