Word line driver having a control switch
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsWei-Li Liao, Sung-Chieh Lin, Kuoyuan (Peter) Hsu
Life of this patent
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Abstract
A word line driver including a control switch configured to receive a control signal, where the control switch is between a first node configured to receive an operating voltage signal and a second node configured to determine an output of the word line driver. The word line driver further includes a cross-coupled amplifier electrically connected to the second node. The word line driver further includes at least one inverter electrically connected to the cross-coupled amplifier. A semiconductor device including the word line driver and a memory array including at least one electronic fuse.
Claims21
A word line driver comprising:
- a control switch configured to receive a control signal, wherein the control switch is between a first node configured to receive an operating voltage signal and a second node;
- a cross-coupled amplifier electrically connected to the second node, the cross-coupled amplifier being configured to generate a node voltage at the second node responsive to an input signal, regardless of a voltage level of the control signal;
- and
- at least one inverter electrically connected to the cross-coupled amplifier and configured to receive the input signal.
A semiconductor device comprising:
- a word line driver comprising:
- a control switch coupled between a first node and a second node, the control switch being configured to receive an operating voltage signal at the first node;
- a cross-coupled amplifier having an input node and an output node, the output node being electrically connected to the control switch at the second node;
- at least one inverter electrically connected to the input node of the cross-coupled amplifier and configured to receive a decoder signal;
- a first transistor, comprising:
- a drain electrically coupled to an output of the word line driver;
- and
- a gate electrically coupled to the second node;
- and
- a second transistor, comprising:
- a drain electrically coupled to the output of the word line driver;
- and
- a gate electrically coupled to the at least one inverter, the gate of the first transistor and the gate of the second transistor are configured to receive two separate signals,
- wherein the word line driver is configured to generate a word line signal at the output of the word line driver based on the operating voltage signal and the decoder signal.
A method comprising:
- generating a word line signal, using a word line driver, based on a node voltage, a decoder signal, and an operating voltage, wherein generating the word line signal comprises:
- causing a control switch to electrically connect a first node to a second node when the word line driver is in a write mode, the first node being configured to receive the operating voltage, and the second node having the node voltage;
- and
- causing the control switch to electrically disconnect the first node from the second node when the word line driver is in a read mode;
- and
- operating a memory array based on the word line signal.
Dependencies are inferred from the claim text.