US 8,786,345 B2Granted

Single-trigger low-energy flip-flop circuit

AssigneeNVIDIA Corporation

InventorsJonah M. Alben, William J. Dally

Life of this patent

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Abstract

One embodiment of the present invention sets forth a technique for capturing and storing a level of an input signal using a single-trigger low-energy flip-flop circuit that is fully-static and insensitive to fabrication process variations, The single-trigger low-energy flip-flop circuit presents only three transistor gate loads to the clock signal and none of the internal nodes toggle when the input signal remains constant, The output signal Q is set or reset at the rising clock edge using a single- trigger sub-circuit. A set or reset may be armed while the clock signal is low, and the set or reset is triggered at the rising edge of the clock.

Claims17

Dependent claims

A single-trigger low-energy flip-flop circuit, comprising:

a trigger sub-circuit that includes a first clock-activated transistor that is directly coupled to power and is configured to arm a trigger signal when an input signal to the single-trigger low-energy flip-flop circuit is at a different level than a level of an output signal generated by the single-trigger low-energy flip-flop circuit, wherein the trigger sub-circuit comprises transistors configured to function as an exclusive-or gate with the input signal and the output signal as inputs and the trigger signal as an output;
and
a latch sub-circuit that includes a second clock-activated transistor and is configured to change the level of the output signal when the trigger signal is armed and a clock signal transitions from a first level to a second level and maintain the level of the output signal when the trigger signal is unarmed, wherein a gate of the first clock-activated transistor and a gate of the second clock-activated transistor are directly coupled to the clock signal.

Dependencies are inferred from the claim text.

Facts

Application: 13/852,987Filed 28 Mar 2013 · continuation
Priority: 27 Apr 2011
Published: US 2013/0214839 A122 Aug 2013
Granted: 22 Jul 2014
Term ends: Not estimatedThe source records don’t support an estimate.

Classification5 codes

H03K 3/286
Using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator: bistable
H03K 3/012
Details: modifications of generator to improve response time or to decrease power consumption
H03K 3/356139
The input circuit having a differential configuration: with synchronous operation
H03K 3/356191
With additional means for controlling the main nodes: with synchronous operation

Family

Application13/095,641Parent of this continuation · filed 27 Apr 2011
US 2013/0214839 A1Pre-grant publication · published 22 Aug 2013
US 8,436,669 B2Parent of this continuation
US 2012/0274377 A1Published application
US 8,786,345 B2This patent

From the US filing history. Foreign family members aren’t listed.

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