Frequency synthesizer with hit-less transitions between frequency- and phase-locked modes
AssigneeSilicon Laboratories Inc.
InventorsColin Weltin-Wu, Yunteng Huang
Life of this patent
Estimating the term…
Abstract
A digital frequency synthesizer provides absolute phase lock and shorter settling time through the use of a digital filter with a phase and frequency path. Control logic control disables the frequency path during the frequency acquisition and sets a wide bandwidth. After frequency acquisition, a counter with digital phase information is reset using the input clock signal to bring the output phase closer to lock with the input signal and the control logic enables the phase path in the digital loop filter to achieve phase lock with a narrower bandwidth than the initial bandwidth.
Claims20
An apparatus to lock an oscillator output signal to an input clock signal comprising:
- a digital loop filter including a frequency path and a phase path, wherein the phase path is disabled during a portion of a start-up sequence;
- an oscillator supplying the oscillator output signal;
- and
- a counter coupled to the oscillator to count transitions of the oscillator output signal and coupled to the digital loop filter, the counter to supply a divided clock signal based on the oscillator output signal.
A method of locking an oscillator output signal to an input clock signal comprising:
- generating the oscillator output signal from an oscillator;
- supplying a digital control word to control the oscillator from a digital loop filter;
- generating a count value in a ripple counter coupled to the oscillator, the count value being based on the oscillator output signal;
- generating a digital representation of a phase difference between the input clock signal and the oscillator output signal;
- adjusting the digital control word from the digital loop filter according to the count value of the ripple counter and the phase difference;
- and
- disabling a phase path of the digital loop filter while operating a frequency path of the digital loop filter during frequency acquisition.
A method of locking an oscillator output signal to an input clock signal comprising:
- generating the oscillator output signal from an oscillator;
- supplying a digital control word to control the oscillator from a digital loop filter;
- in response to a startup condition enabling a frequency path of the digital loop filter and disabling a phase path while achieving frequency lock;
- and
- transitioning between a frequency-locked mode and a phase-locked mode of operation, the transitioning including enabling the phase path, resetting a counter coupled to the oscillator and the digital loop filter, and holding registers in the digital loop filter for at least clock cycle.
Dependencies are inferred from the claim text.