Phase-lock loop-based clocking system, methods and apparatus

A method of generating a clock signal comprising:

• receiving a first clock signal having a first phase at a first input to a phase-locked loop;
• locking on the first clock signal within a first time period;
• detecting the first phase of the first clock signal;
• and
• frequency multiplying the first clock signal or a signal derived therefrom by N using an oscillator to generate a clock signal.

A clocking system comprising:

• a zero-crossing detector having a first input and a first output, the first input configured to receive a first input signal;
• and
• a phased-locked loop circuit having a second input and a second output, wherein the second input is in electrical communication with the first output, the phase-locked loop circuit comprising:
• a phase detector in electrical communication with the second input, the phase detector comprising a reference input and a phase error signal output, and
• a voltage controlled oscillator (VCO), the voltage controlled oscillator having a VCO frequency;
• and
• an arbitrary waveform generator comprising an arbitrary waveform generator output and a sweep trigger signal input,
• wherein the VCO is in electrical communication with the arbitrary waveform generator output and a phase error signal output through a loop filter and
• wherein the phase-locked loop circuit is configured to generate a clock signal.