Signal input circuit and semiconductor device having the same

A signal input circuit, comprising:

• an input unit comprising a plurality of transistors and configured to receive a first input signal to output an output signal to an output node;
• a first compensation circuit connected to the output node, discharging the output node in response to a second input signal;
• a second compensation circuit connected to the output node, supplying a current to the output node in response to the second input signal;
• and
• a switching circuit respectively connected between each of the input unit, the first compensation circuit and the second compensation circuit through first to third connection nodes, configured to connect the first to third connection nodes to a ground voltage terminal to compensate for changes in response times of the transistors of the input unit in response to at least one operation mode selection signal,
• wherein in a differential mode, the first and second compensation circuits are responsive to state changes in the second input signal to selectively discharge the output node or supply the current to the output node to compensate for differences in response times of the transistors of the input unit and reduce a shift difference of the output signal.

A signal input circuit, comprising:

• a PMOS transistor connected between a power source voltage terminal and an output node, and controlled by a first input signal;
• an NMOS transistor connected between the output node and a switching circuit, and controlled by the first input signal;
• a first compensation circuit connected to the output node, compensating an operation delay of the PMOS transistor in response to a second input signal;
• a second compensation circuit connected to the output node, compensating an operation delay of the NMOS transistor in response to the second input signal;
• and
• an enable circuit enabling the PMOS transistor, the NMOS transistor and the first and second compensation circuits in response to at least one operation mode selection signal.

A semiconductor device, comprising:

• a first circuit;
• and
• a second circuit receiving a data signal from the first circuit, and comprising a signal input circuit for receiving the data signal from the first circuit,
• wherein the signal input circuit comprises:
• an input unit comprising a plurality of transistors and configured to receive a first input signal to output an output signal to an output node;
• a first compensation circuit connected to the output node, discharging the output node in response to a second input signal;
• a second compensation circuit connected to the output node, supplying a current to the output node in response to the second input signal;
• and
• an enable circuit coupled to the input unit and the first and second compensation circuits and configured to enable the input unit and the first and second compensation circuits in response to at least one operation mode selection signal,
• wherein in a differential mode, the first and second compensation circuits are responsive to state changes in the second input signal to selectively discharge the output node or supply the current to the output node to compensate for differences in response times of the transistors of the input unit and reduce a shift difference of the output signal.