Inspection device and inspection method
AssigneeLapis Semiconductor Co., Ltd.
InventorShuichiro Fujimoto
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AssigneeLapis Semiconductor Co., Ltd.
InventorShuichiro Fujimoto
Estimating the term…
The present invention provides semiconductor integrated circuit, inspection device and inspection method for inspecting whether inspection target is functioning normally regardless to start-up period of a power supply voltage. The inspection device includes a reset control circuit and a tester. When a reset signal is inputted from a power-on reset circuit to a first terminal, the reset control circuit starts output of a reset execution signal having the same level as the reset signal. When a trigger signal is inputted from a control device to the second input terminal, the reset control circuit finishes the output of the reset execution signal and starts output of a release execution signal that has the same level as a reset release signal from the output terminal. The tester determines whether the power-on reset circuit is functioning normally by determining whether signals outputted from the reset control circuit are at predetermined levels.
An inspection device comprising:
An inspection method comprising:
Dependencies are inferred from the claim text.