Semiconductor packages and methods of formation thereof

A semiconductor package comprising:

• a vertical semiconductor chip having a first major surface on one side of the vertical semiconductor chip and a second major surface on an opposite side of the vertical semiconductor chip, wherein the first major surface includes a first contact region and the second major surface includes a second contact region, and wherein the vertical semiconductor chip is configured to regulate flow of current from the first contact region to the second contact region along a current flow direction;
• a back side conductor disposed on a drain contact region of the second major surface;
• a first encapsulant in which the vertical semiconductor chip and the back side conductor are disposed, wherein the first encapsulant covers a first portion of sidewalls of the back side conductor;
• a second encapsulant surrounding an outer sidewall of the first encapsulant in which the first encapsulant, the vertical semiconductor chip, and the back side conductor are disposed, wherein the second encapsulant covers a remaining portion of the sidewalls of the back side conductor;
• a plurality of contact pads disposed on a major surface of the second encapsulant;
• and
• an interconnect disposed in the second encapsulant, the interconnect coupling the first contact region with a pad of the plurality of contact pads.