Conductive structure and method for forming the same
AssigneeChipMOS Technologies Inc.
InventorChung-Pang Chi
Life of this patent
Estimating the term…
Loading patent…
AssigneeChipMOS Technologies Inc.
InventorChung-Pang Chi
Estimating the term…
A conductive structure for a semiconductor chip and a method for forming the conductive structure are provided. The semiconductor chip comprises a plurality of first pads and second pads. The pad area is defined with a first area, a second area and a third area, wherein the first area is located between the second area and the third area. Each of the first pads and the second pads are interlaced to each other on the first area. The conductive structure comprises a plurality of conductive bumps formed on each of the first pads and the second pads respectively to electrically connect with each of the first pads and the second pads. Each of the conductive bumps has a first bump-width disposed on the first area and a second bump-width disposed on one of the second and third areas in which the first bump-width is shorter than the second bump-width.
A conductive structure for a semiconductor chip, the semiconductor chip comprising a semiconductor substrate, a plurality of first pads, a plurality of second pads, a passivation layer and a plurality of under bump metal layers, wherein each of the first pads and each of the second pads are alternately arranged on a pad area of the semiconductor substrate, the pad area defines a first area, a second area and a third area, the first area is located between the second area and the third area, each of the first pads and each of the second pads are interlaced with each other on the first area, and the first area is extending toward the second area and the third area respectively, and wherein the passivation layer formed on the semiconductor substrate has a plurality of first openings to partially expose each of the first pads and each of the second pads, and each of the under bump metal layers is formed on the passivation layer and is electrically connected with each of the first pads and each of the second pads through each of the first openings formed in the passivation layer, the conductive structure comprising:
A method for forming a conductive structure of a semiconductor chip, the semiconductor chip comprising a semiconductor substrate, a plurality of first pads, a plurality of second pads, a passivation layer and an under bump metal layer, wherein each of the first pads and each of the second pads are alternately arranged on a pad area of the semiconductor substrate, the pad area defines a first area, a second area and a third area, the first area is located between the second area and the third area, each of the first pads and each of the second pads are interlaced with each other on the first area, and the first area is extending toward the second area and the third area respectively, and wherein the passivation layer formed on the semiconductor substrate has a plurality of first openings to partially expose the first pads and the second pads, and the under bump metal layer is formed on the passivation layer and covers each of the first pads and each of the second pads through each of the first openings formed in the passivation layer to electrically connect with each of the first pads and each of the second pads, the method comprising the steps of:
Dependencies are inferred from the claim text.