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US 8,786,096 B2Granted
Nonvolatile semiconductor memory having a word line bent towards a select gate line side
AssigneeKabushiki Kaisha Toshiba
InventorsTakeshi Kamigaichi, Takeshi Murata, Itaru Kawabata
Life of this patent
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Abstract
A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line.
Claims14
A nonvolatile semiconductor memory comprising:
- cell units each having a first select gate transistor, a second select gate transistor, memory cells connected in series in a first direction and provided between the first and second select gate transistors;
- and
- a block comprising the cell units arranged in a second direction which crosses the first direction and having a first select gate line extending in the second direction and connected to the first select gate transistors, a second select gate line extending in the second direction and connected to the second select gate transistors, and word lines extending in the second direction, respectively connected to the memory cells;
- wherein:
- on a first side of the block, the word lines extend in the second direction, are respectively connected to contact plugs, respectively have distal ends, at least one of the word lines at the first select gate line side is bent toward the first select gate line side, at least one of the word lines at the second select gate line side is bent toward the second select gate line side, and
- on a second side of the block opposite to the first side, the word lines extend in the second direction, have no bent points, and are not connected to contact plugs.
3 more elements
A nonvolatile semiconductor memory comprising:
- cell units each having a first select gate transistor, a second select gate transistor, memory cells connected in series in a first direction and provided between the first and second select gate transistors;
- and
- first and second blocks, each comprising the cell units, arranged in a second direction which crosses the first direction and having a first select gate line extending in the second direction and connected to the first select gate transistors, a second select gate line extending in the second direction and connected to the second select gate transistors, and word lines extending in the second direction, respectively connected to the memory cells;
- wherein the first select gate line in the first block and the first select gate line in the second block are adjacent to each other,
- word lines in the first block, on a first side of the blocks, extend in the second direction, are respectively connected to contact plugs, respectively have distal ends, at least one of the word lines in the first block at a first select gate line side is bent toward the first select gate line side,
- the word lines in the first block, on a second side of the blocks opposite to the first side, extend in the second direction, have no bent points, and are not connected to a contact plug,
- the word lines in the second block, on the second side, extend in the second direction, are respectively connected to contact plugs, and respectively have distal ends, at least one of the word lines in the second block at the first select gate line side is bent toward the first select gate line side, and
- the word lines in the second block, on the first side of the blocks, extend in the second direction, have no bent points, and are not connected to a contact plug.
5 more elements
Dependencies are inferred from the claim text.