Chip package and method for forming the same

A method for forming a chip package, comprising:

• providing a substrate, wherein a device region, a signal pad, and a ground pad are respectively disposed in or on the substrate, and the signal pad is electrically connected to the device region;
• forming a signal conducting layer and a ground conducting layer on a surface of the substrate, wherein the signal conducting layer is electrically connected to the signal pad;
• forming a protection layer on the surface of the substrate, wherein the protection layer exposes a portion of the signal conducting layer and completely covers the entire side edges of the signal conducting layer, wherein a side edge of the ground conducting layer is exposed;
• forming a signal bump on the opening of the protection layer, wherein the signal bump is electrically connected to the signal pad through the signal conducting layer;
• disposing a dummy electrical connection structure on the surface of the substrate;
• forming a conducting layer on the substrate, wherein the conducting layer is electrically connected to the dummy electrical connection structure, and the protection layer partially covers the conducting layer such that a side edge of the conducting layer is exposed;
• and
• dicing the substrate to form at least one chip package, wherein the side edge of the ground conducting layer is exposed at a side of the substrate after the substrate is diced.