Solid-state imaging device, method for manufacturing solid-state imaging device, method for manufacturing solid-state imaging element, and semiconductor device

A semiconductor device, comprising:

• a first semiconductor substrate configured to include a semiconductor chip and a scribe line region that is provided along a periphery of the semiconductor chip;
• a wiring layer that is formed to be layered on the first semiconductor substrate, wherein the wiring layer includes a guard ring layer in a region corresponding to a region, the region being positioned between a blade region in the scribe line region and the semiconductor chip, of the semiconductor substrate, and wherein the wiring layer and the guard ring layer include the same material;
• a second semiconductor substrate that is formed to be layered on the wiring layer;
• and
• a groove that is provided in the first semiconductor substrate between the blade region in the scribe line region and the semiconductor chip, wherein the groove penetrates through the first semiconductor substrate, wherein a depth of the groove is equal to the depth of the semiconductor substrate, wherein the groove contains a chipping prevention wall, and wherein the chipping prevention wall does not extend into the wiring layer.

A solid-state imaging device, comprising:

• a semiconductor substrate configured to include a solid-state imaging element that is provided with a photoelectric conversion region, and a scribe line region that is provided along a periphery of the solid-state imaging element;
• a wiring layer that is formed to be layered on the semiconductor substrate, wherein the wiring layer includes a guard ring layer in a region corresponding to a region, the region being positioned between a blade region in the scribe line region and the solid-state imaging element, of the semiconductor substrate, and wherein the wiring layer and the guard ring layer include the same material;
• a support substrate that is formed to be layered on the wiring layer;
• and
• a groove that is provided in the semiconductor substrate between the blade region in the scribe line region and the solid-state imaging element, wherein the groove penetrates through the semiconductor substrate;
• a chipping prevention wall formed in the groove, wherein the chipping prevention wall includes polysilicon filling an inside of the groove, wherein the chipping prevention wall does not extend into the wiring layer, and wherein at least one of a SiN layer and a SiO2 layer is formed on a wall surface of the groove.