Non-replacement gate nanomesh field effect transistor with pad regions

A semiconductor structure comprising:

• a vertical stack of at least two first patterned semiconductor layers comprising a first semiconductor material and at least one second patterned semiconductor layer comprising a second semiconductor material, wherein each of said at least two first patterned semiconductor layers comprises at least one semiconductor nanowire and a pair of first pad regions adjoining said at least one semiconductor nanowire, and wherein each of said at least one second patterned semiconductor layer comprises a pair of second pad regions that are laterally spaced from each other;
• a gate electrode structure straddling said at least one semiconductor nanowire;
• a gate spacer laterally surrounding said gate electrode structure;
• and
• both a raised source region and a raised drain region comprising a semiconductor material and contacting surfaces of said at least one semiconductor nanowire and each of said first and second pad regions.