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US 8,785,903 B2Granted
Memory cell array and variable resistive memory device including the same
AssigneeSK hynix Inc.
InventorsSung Cheoul Kim, Kang Sik Choi
Life of this patent
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Abstract
A memory cell array and a resistive variable memory device including the memory cell array are provided. The memory cell array includes a memory group. The memory cell array includes a pair of word lines, an inter-pattern insulating layer interposed between the pair of word lines, and a plurality of active pillars, each having one side contacted with the inter-pattern insulating layer and other sides surrounded by the word line.
Claims20
A memory cell array, comprising:
- a pair of word lines;
- an inter-pattern insulating layer interposed between the pair of word lines;
- and
- a plurality of active pillars, each having one side contacted with the inter-pattern insulating layer and other sides surrounded by the word line.
1 more element
A memory cell array, comprising:
- a first memory group including a first word line, a second word line adjacent to the first word line and extending parallel to the first word line, a first inter-pattern insulating layer interposed between the first and second word lines, a plurality of first active pillars arranged between the first word line and the first inter-pattern insulating layer in a first rule, and a plurality of second active pillars formed between the second word line and the first inter-pattern insulating layer in the first rule to correspond to the plurality of first active pillars;
- and
- a second memory group including a third word line adjacent to the second word line and extending parallel to the second word line, a fourth word line adjacent to the third word line and extending parallel to the third word line, a second inter-pattern insulating layer interposed between the third and fourth word lines, a plurality of third active pillars arranged between the third word line and the second inter-pattern insulating layer in the first rule, and a plurality of fourth active pillars formed between the fourth word line and the second inter-pattern insulating layer in the first rule to correspond to the plurality of third active pillars.
A variable resistive memory device, comprising:
- a first word line;
- a second word line, arranged in a direction parallel to the first word line, and spaced from the first word line by a first length corresponding to a half of critical dimension;
- an inter-pattern insulating layer between the first and second word lines;
- a plurality of first active pillars surrounded by the first word line and the inter-pattern insulating layer, and arranged at intervals of the first length;
- a plurality of second active pillars surrounded by the second word line and the inter-pattern insulating layer, and arranged at intervals of the first length to correspond to the plurality of first active pillars;
- and
- a plurality of variable resistive bodies arranged on the pluralities of the first and second active pillars and electrically connected to the first and second active pillars.
4 more elements
Dependencies are inferred from the claim text.