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US 8,785,901 B2Granted
Semiconductor devices having metal oxide patterns
AssigneeSamsung Electronics Co., Ltd.
InventorsJunho Jeong, Sukhun Choi, Jangeun Lee, Kyunghyun Kim, Sechung Oh, Kyungtae Nam
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Abstract
Methods of fabricating semiconductor devices are provided including forming a dielectric interlayer on a substrate, the dielectric interlayer defining an opening therein. A metal pattern is formed in the opening. An oxidization process is performed on the metal pattern to form a conductive metal oxide pattern, and the conductive metal oxide pattern is planarized. Related semiconductor devices are also provided.
Claims10
A semiconductor device comprising:
- a dielectric layer on a substrate;
- a metal pattern in the dielectric layer;
- a conductive metal-containing pattern on the metal pattern, the conductive metal-containing pattern including a same metal as the metal pattern and having a planarized top surface being coplanar with a top surface of the dielectric layer;
- and
- a variable resistor on the conductive metal-containing pattern and electrically connected to the conductive metal-containing pattern,
- wherein the conductive metal-containing pattern comprises a conductive metal oxide pattern adjacent to the metal pattern and an upper metal pattern on the conductive metal oxide pattern;
- and
- wherein an oxygen concentration of the conductive metal oxide pattern is higher than an oxygen concentration of the upper metal pattern.
5 more elements
A semiconductor device comprising:
- a dielectric layer on a substrate;
- a metal pattern in the dielectric layer;
- a conductive metal-containing pattern on the metal pattern, the conductive metal-containing pattern including a same metal as the metal pattern and having a planarized top surface being coplanar with a top surface of the dielectric layer;
- a variable resistor on the conductive metal-containing pattern and electrically connected to the conductive metal-containing pattern;
- and
- an amorphous lower electrode between the top surface of the conductive metal-containing pattern and the variable resistor.
3 more elements
A semiconductor device comprising:
- a dielectric layer on a substrate;
- a first metal pattern in the dielectric layer;
- a second metal pattern on the first metal pattern, the second metal pattern including a same metal as the first metal pattern, and having a planarized top surface being coplanar with the a surface of the dielectric layer;
- and
- a variable resistor on the second metal pattern and electrically connected to the second metal pattern,
- wherein a grain size of the second metal pattern is smaller than a grain size of the first metal pattern.
3 more elements
Dependencies are inferred from the claim text.