Method of forming a memory cell by reducing diffusion of dopants under a gate

A method of forming a memory cell, comprising:

• providing a substrate of semiconductor material of a first conductivity type;
• forming first and second spaced-apart regions in the substrate of a second conductivity type, with a channel region therebetween;
• forming a conductive floating gate over and insulated from the substrate;
• forming a conductive control gate over and insulated from the floating gate;
• forming a conductive erase gate laterally to one side of, and insulated from, the floating gate;
• forming a conductive select gate laterally to an opposite side of the one side of, and insulated from, the floating gate;
• and
• implanting, after the forming of the floating gate and the select gate, a dopant into a portion of the channel region underneath the select gate using an implant process that injects the dopant at an angle with respect to a surface of the substrate that is less than ninety degrees and greater than zero degrees.