Method to tune narrow width effect with raised S/D structure

A method for forming a semiconductor device, the method comprising:

• providing a substrate of a first conductivity type;
• forming thereon a field effect transistor (FET) structure including a gate, said gate having a gate width, a first raised source/drain (S/D) region and a second raised S/D region, the first and second raised S/D regions of a second conductivity type;
• forming a halo region by implanting dopants of the first conductivity type within the substrate, wherein forming the halo region further comprises, implanting first dopants of the first conductivity type at a first predetermined tilt angle and at a first predetermined twist angle substantially equal to zero degrees relative to a direction perpendicular to the gate width to form a first portion of the halo region and implanting second dopants of the first conductivity type at a second predetermined tilt angle and at a second predetermined twist angle to form a second portion of the halo region, such that a doping concentration at a given depth below a channel surface near a center of the first raised S/D region is lower than a doping concentration at the given depth below the channel surface near an edge of the first raised S/D region.