FinFET non-volatile memory and method of fabrication

A method of manufacturing a FinFET non-volatile memory device, comprising:

• providing a substrate;
• depositing a layer of a semiconductor material over said substrate;
• depositing a first dielectric layer on top of said semiconductor layer;
• patterning said semiconductor layer and said first dielectric layer to form a fin structure;
• depositing a charge storage layer on a first sidewall surface, a second sidewall surface and a top surface of said fin structure, said first sidewall being parallel to and opposing said second sidewall;
• damaging said charge storage layer on said first sidewall and top surface by an angled ion implantation process;
• etching said damaged charged storage layer until it is substantially removed;
• and
• forming a first gate structure adjacent to said first sidewall and a second gate structure adjacent to said undamaged charge storage layer,
• wherein said first and second gate structures each comprise a gate dielectric and a gate electrode;
• wherein for said first gate structure, said gate dielectric is adjacent to said first sidewall and said first gate electrode is adjacent to said gate dielectric;
• and
• wherein for said second gate structure, said gate dielectric is adjacent to said charge storage layer and said second gate electrode is adjacent to said gate dielectric.

A method of manufacturing a FinFET non-volatile memory device, comprising:

• providing a substrate;
• depositing a layer of a semiconductor material over said substrate;
• depositing a first dielectric layer on top of said semiconductor layer;
• patterning said semiconductor layer and said first dielectric layer to form a fin structure;
• depositing a charge storage layer on a first sidewall surface, a second sidewall surface and a top surface of said fin structure, said first sidewall being parallel to and opposing said second sidewall;
• damaging said charge storage layer on said first sidewall and top surface by an angled ion implantation process;
• etching said damaged charged storage layer until it is substantially removed;
• and
• forming a first gate structure adjacent to said first sidewall and a second gate structure adjacent to said undamaged charge storage layer,
• wherein said charge storage layer comprises a charge storage stack selected from the group consisting of:
• dielectric/poly-silicon/dielectric, silicon dioxide/silicon nitride/silicon dioxide, silicon dioxide/high-k dielectric/silicon dioxide, and a dielectric that contains nanoparticles.

A method of manufacturing a FinFET non-volatile memory device, comprising:

• providing a substrate;
• depositing a layer of a semiconductor material over said substrate;
• depositing a first dielectric layer on top of said semiconductor layer;
• patterning said semiconductor layer and said first dielectric layer to form a fin structure;
• depositing a charge storage layer on a first sidewall surface, a second sidewall surface and a top surface of said fin structure, said first sidewall being parallel to and opposing said second sidewall;
• depositing a second dielectric layer over said charge storage layer;
• damaging said second dielectric layer on said first sidewall and top surface by an angled ion implantation process;
• etching said damaged second dielectric layer until it is substantially removed, exposing portions of said charge storage layer;
• etching said exposed portions of said charge storage layer until they are substantially removed;
• etching said remaining second dielectric layer until it is substantially removed;
• and,
• forming a first gate structure adjacent to said first sidewall and a second gate structure adjacent to said undamaged charge storage layer.