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US 8,785,268 B2Granted
Memory system with Fin FET technology
AssigneeSpansion LLC
InventorsWei Zheng, Lei Xue, Kuo-Tung Chang
Life of this patent
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Abstract
A method for manufacturing a memory system is provided including forming a charge-storage layer on a first insulator layer including insulating the charge-storage layer from a vertical fin, forming a second insulator layer from the charge-storage layer, and forming a gate over the second insulator includes forming a fin field effect transistor.
Claims21
A method for manufacturing a memory system comprising:
- forming a vertical fin of a semiconductor substrate being a continuous layer, the vertical fin protruding vertically, and being part of the semiconductor substrate;
- forming a charge-storage layer on a first insulator layer including insulating the charge-storage layer from the vertical fin;
- forming a second insulator layer from the charge-storage layer;
- removing at least portions of the first insulator layer, the charge storage layer and the second insulator layer from above the vertical fin such that the charge storage layer is isolated on both sides of the vertical fin;
- and
- forming a gate over the vertical fin to thereby form a fin field effect transistor.
3 more elements
A method for manufacturing a memory system comprising:
- forming a vertical fin of a semiconductor substrate being a continuous layer, the vertical fin protruding vertically, and being part of the semiconductor substrate and having a sloped sidewall substantially vertical, wherein the vertical fin is capped by an oxide layer, and the oxide layer is in direct contact with a word line;
- forming a silicon rich nitride layer on a first dielectric layer including insulating the silicon rich nitride layer from the vertical fin, wherein the silicon rich nitride layer is a charge-storage layer;
- steam oxidizing a second dielectric layer from the charge-storage layer;
- and
- forming the word line over the vertical fin to thereby form a fin field effect transistor.
2 more elements
A memory system comprising:
- a semiconductor substrate being a continuous layer;
- a vertical fin formed of the semiconductor substrate, the vertical fin protruding vertically, and being part of the semiconductor substrate;
- a plurality of first insulator layers on both sides of the vertical fin;
- a plurality of charge-storage layers on each of the first insulator layers, wherein the charge-storage layers are isolated on both sides of the vertical fin;
- a plurality of second insulator layers on the charge-storage layers;
- and
- a gate on the vertical fin.
4 more elements
Dependencies are inferred from the claim text.