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US 8,772,862 B2Granted
Semiconductor device and method for fabricating the same
AssigneeSK hynix Inc.
InventorHeung-Jae Cho
Life of this patent
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Abstract
A vertical channel transistor includes a pillar formed over a substrate, and a gate electrode formed on sidewalls of the pillar, wherein the pillar includes a source area, a vertical channel area over the source area, a drain area over the vertical channel area, and a leakage prevention area interposed between the vertical channel area and the drain area.
Claims21
A vertical channel transistor comprising:
- a pillar formed over a substrate;
- and
- a gate electrode formed on sidewalls of the pillar,
- wherein the pillar comprises a source area, a vertical channel area over the source area, a drain area over the vertical channel area, and a leakage prevention area interposed between the vertical channel area and the drain area.
1 more element
A method for fabricating a vertical channel transistor, comprising:
- forming a pillar over a substrate;
- and
- forming a gate electrode on sidewalls of the pillar,
- wherein the pillar comprises a source area, a vertical channel area over the source area, a leakage prevention area over the vertical channel area, and a drain area.
1 more element
A semiconductor device comprises:
- a pillar formed over a substrate including a buried bit line;
- a gate electrode formed on sidewalls of the pillar;
- and
- a capacitor connected to a drain area of the pillar,
- wherein the pillar comprises a source area connected to the buried bit line, a vertical channel area over the source area, a leakage prevention area over the vertical channel area, and a drain area over the leakage prevention area.
2 more elements
Dependencies are inferred from the claim text.