GaN HEMTs with a back gate connected to the source
AssigneeHRL Laboratories, LLC
InventorKarim S Boutros
Life of this patent
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Abstract
The present invention reduces the dynamic on resistance in the channel layer of a GaN device by etching a void in the nucleation and buffer layers between the gate and the drain. This void and the underside of the device substrate may be plated to form a back gate metal layer. The present invention increases the device breakdown voltage by reducing the electric field strength from the gate to the drain of a HEMT. This electric field strength is reduced by placing a back gate metal layer below the active region of the channel. The back gate metal layer may be in electrical contact with the source or drain.
Claims11
A HEMT device comprising:
- a substrate, a buffer layer, a channel layer, and a barrier layer;
- a source, a gate, and a drain disposed on the barrier layer;
- a void in the buffer layer and substrate below an active region between the gate and the drain;
- a back gate metal layer disposed on an underside of the substrate;
- the source is electrically connected to the back gate metal layer;
- a conductive plating on the surfaces of the substrate and buffer layer exposed by the void below the active region between the gate and drain.
A method of forming a HEMT device comprising:
- receiving a substrate with a buffer layer, a channel layer, a barrier layer formed on a top side of the substrate thereon;
- forming a source, a drain and a gate on the barrier layer;
- etching the underside of the substrate through the buffer layer to form a void in a region between the gate and the drain;
- forming a back gate metal layer on the underside of the substrate, on an underside of the channel layer and on edges of the nucleation layer and buffer layer exposed by the formation of the void in the region between the gate and drain.
Dependencies are inferred from the claim text.