Semiconductor wafer including lattice matched or pseudo-lattice matched buffer and GE layers, and electronic device

An electronic device comprising:

• an Si water;
• an inhibiting layer that is formed on the wafer and that inhibits crystal growth, the inhibiting layer including a covering region that covers a portion of the wafer and an open region that does not cover a portion of the wafer within the covering region;
• a Ge layer that is crystal-grown in the open region;
• a buffer layer that is epitaxially crystal-grown on the Ge layer and is a group 3-5 compound semiconductor layer containing P;
• a functional layer that is epitaxially crystal-grown on the buffer layer;
• and
• an electronic element that is formed on the functional layer, wherein the functional layer is an element formation layer that is a group 3-5 compound layer or a group 2-6 compound layer that lattice matches or pseudo-lattice matches with Ge, and the element formation layer has an arithmetic mean roughness value of no greater than 0.02 μm.