Fabricating method of transistor

A fabricating method of a transistor, comprising:

• forming a patterned sacrificed layer on a substrate, wherein the patterned sacrificed layer includes a plurality of openings exposing the substrate;
• by using the patterned sacrificed layer as a mask, performing a doping process on the substrate, thereby forming a doped source region and a doped drain region in the substrate exposed by the openings;
• performing a selective growth process to form a source and a drain on the doped source region and the doped drain region, respectively;
• removing the patterned sacrificed layer to expose the substrate between the source and the drain;
• and
• forming a gate on the substrate between the source and the drain, wherein a height of the gate is substantially the same as a height of the source and the drain.