Method for fabricating a field effect transistor, and field effect transistor
AssigneeInfineon Technologies AG
InventorsLuis-Felipe Giles, Frank Lau, Rainer Liebmann
Life of this patent
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Abstract
In a method for fabricating a field effect transistor, a first source/drain region and a second source/drain region are formed in a substrate. A channel region is formed between the first source/drain region and the second source/drain region. A gate region is formed on the channel region. Micro-cavities are formed in the substrate at least below the channel region, and the micro-cavities are oxidized.
Claims27
A method for fabricating a field effect transistor, comprising:
- forming a first source/drain region and a second source/drain region in a substrate;
- forming a channel region between the first source/drain region and the second source/drain region;
- forming a gate region on the channel region;
- forming micro-cavities in the substrate below the channel region and laterally between the first source/drain region and the second source/drain region;
- oxidizing the micro-cavities to form discontinuous, oxidized micro-cavities below the channel region and laterally between the first source/drain region and the second source/drain region;
- and
- doping the first source/drain region and the second source/drain region after the micro-cavities are oxidized, to thereby form a field effect transistor comprising the discontinuous, oxidized micro-cavities below the channel region and laterally between the first source/drain region and the second source/drain region.
A method for fabricating a field effect transistor, comprising:
- forming a first and a second source/drain region in a substrate;
- forming a channel region between the first and the second source/drain region;
- forming a gate region on the channel region;
- forming micro-cavities in the substrate below the channel region by implanting light ions into the substrate region laterally between the first source/drain region and the second source/drain region;
- oxidizing the micro-cavities to form discontinuous, oxidized micro-cavities below the channel region and laterally between the first source/drain region and the second source/region;
- and
- doping the first source/drain region and the second source/drain region after the micro-cavities are oxidized, to thereby form a field effect transistor comprising the discontinuous, oxidized micro-cavities below the channel region and laterally between the first source/drain region and the second source/drain region.
A method for fabricating a field effect transistor, comprising:
- forming a first and a second source/drain region in a substrate;
- forming a channel region between the first and the second source/drain region;
- forming a gate region on the channel region;
- forming micro-cavities in the substrate below the channel region and laterally between the first source/drain region and the second source/drain region;
- oxidizing the micro-cavities to form, below the channel region and laterally between the first source/drain region and the second source/drain region, discontinuous micro-cavities having silicon dioxide precipitates;
- and
- doping the first source/drain region and the second source/drain region after the micro-cavities are oxidized, to thereby form a field effect transistor comprising the discontinuous, oxidized micro-cavities below the channel region and laterally between the first source/drain region and the second source/drain region,
- wherein a tensile stress field is produced at least in a partial region of the channel region.
Dependencies are inferred from the claim text.