Multi-chip semiconductor package and method of fabricating the same

A method of fabricating a semiconductor package, comprising:

• preparing a first semiconductor chip having a first chip pad and a first laser blocking electrode formed on the first chip pad, and a second semiconductor chip having a second chip pad and a second laser blocking electrode formed on the second chip pad;
• mounting the second semiconductor chip on the first semiconductor chip to expose the first laser blocking electrode;
• forming an insulating film between the first laser blocking electrode and the second laser blocking electrode;
• forming a groove in the insulating film using a laser;
• and
• forming an interconnection in contact with the first laser blocking electrode and the second laser blocking electrode in the groove.

A method of fabricating a semiconductor package comprising:

• preparing a substrate including a finger electrode and a substrate projection electrode, the substrate projection electrode being formed on the finger electrode;
• mounting a first semiconductor chip on the substrate, the first semiconductor chip including a first chip pad and a first projection electrode formed on the first chip pad, the first semiconductor chip being arranged to not overlap the finger electrode or the substrate projection electrode;
• mounting a second semiconductor chip on the first semiconductor chip to expose the first projection electrode, the second semiconductor chip including a second chip pad and a second projection electrode formed on the second chip pad, the first and second semiconductor chips being mounted using an insulating film, the insulating film being formed between the first projection electrode and the second projection electrode;
• forming a first groove in the insulating film between the substrate projection electrode and the first projection electrode, a second groove being formed between the first projection electrode and the second projection electrode;
• forming a first interconnection along the first groove and a second interconnection along the second groove, the first and second interconnections being physically and/or electrically connected to the substrate projection electrode, the first projection electrode, and the second projection electrode;
• and
• forming first and second external terminals at a rear surface of the substrate.