Running native code across single or multi-core hybrid processor achitecture
AssigneeInternational Business Machines Corporation
InventorsNobuhiro Asai, Rajesh R. Bordawekar, Ravi Shah, Hayato Uenohara
Life of this patent
Estimating the term…
Loading patent…
AssigneeInternational Business Machines Corporation
InventorsNobuhiro Asai, Rajesh R. Bordawekar, Ravi Shah, Hayato Uenohara
Estimating the term…
Provided is a method that enables an interpretive engine to execute in a non-homogeneous, multiple processor architecture. Am interpretive engine is modified to identify code native to a target processor that is executing an ISA different than the ISA of the processor executing the interpretive engine. An intermediate function is called to correlate the native code with a processor type and a target processor is identified. A context is created for the native code and the context is either transmitted to the target processor or stored in a memory location such that the target processor may retrieve the context. Once the context is transmitted, the target processor executes the task. Results are either transmitted to the originating processor or placed in memory such that the originating processor can access the result and the originating processor is signaled of the completion of the task.
A method, executed in a multi-processing environment, comprising:
A system, including a multi-processing system, comprising:
A computer programming product for assigning computing tasks in a non-homogeneous, multi-processor environment, comprising:
Dependencies are inferred from the claim text.