Compiling method and processor using the same
AssigneeSamsung Electronics Co., Ltd.
InventorsTaisong Kim, Hong-Seok Kim, Chang-Woo Baek
Life of this patent
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Abstract
A compiling method and a processor using the same are provided. The compiling method includes simulating a first program code which includes at least one first operation command to generate a first operation result, compiling the first program code to generate a second program code which includes at least one second operation command, simulating the second program code to generate a second operation result, and comparing the first operation result with the second operation result to verify whether the second program code is valid.
Claims11
A compiling method, the method comprising:
- simulating program code which includes at least one first operation command to generate a first operation result;
- translating the program code into machine code of a processor that comprises at least one second operation command;
- simulating the machine code to generate a second operation result;
- and
- comparing the first operation result with the second operation result to verify whether the machine code is valid, wherein:
- the translating of the program code comprises register-allocating the program code, and
- the simulating of the program code comprises simulating the program code by referring to stack information of the machine code, which is generated after the program code is register-allocated.
A non-transitory computer-readable storage medium storing a program to implement a compiling method, the program comprising instructions to cause a computer to:
- simulate program code which includes at least one first operation command to generate a first operation result;
- translate the program code into machine code of a processor that comprises at least one second operation command;
- simulate the machine code to generate a second operation result;
- and
- compare the first operation result with the second operation result to verify whether the machine code is valid, wherein:
- the translating of the program code comprises register-allocating the program code, and
- the simulating of the program code comprises simulating the program code by referring to stack information of the machine code, which is generated after the program code is register-allocated.
A processor comprising:
- a code transformer configured to translate program code which includes at least one first operation command into machine code of a computer comprising at least one second operation command;
- a first simulator configured to simulate the program code to generate a first operation result;
- and
- a second simulator configured to simulate the machine code to generate a second operation result, wherein:
- the processor verifies whether the machine code is valid by comparing the first operation result and the second operation result,
- the code transformer register-allocates the program code and transmits stack information of the machine code, which is generated after the program code is register-allocated, and
- the first simulator simulates the program code by referring to the stack information.
Dependencies are inferred from the claim text.